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fix(smp): add per-core TSS descriptors in GDT and defer AP wakeup after kernel init

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RarDog
2026-09-02 19:51:53 +03:00
parent eed05c1eca
commit 28da1587b9
4 changed files with 99 additions and 37 deletions
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kernel/src/arch/gdt.rs
+78 -21
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@@ -1,7 +1,10 @@
//! Global Descriptor Table (GDT) and Task State Segment (TSS) for x86_64
//! Global Descriptor Table (GDT) and Task State Segment (TSS) for x86_64 SMP
//! Supports up to 4 CPU Cores with dedicated TSS descriptors.
use core::mem::size_of;
pub const MAX_CPUS: usize = 4;
#[repr(C, packed)]
pub struct TaskStateSegment {
_reserved1: u32,
@@ -40,37 +43,60 @@ struct GdtDescriptor {
#[no_mangle]
pub static mut TSS: TaskStateSegment = TaskStateSegment::new();
// 8 entries: Null, KCode, KData, UData, UCode, TSS Low, TSS High, Null
static mut GDT: [u64; 8] = [
#[no_mangle]
pub static mut PER_CPU_TSS: [TaskStateSegment; MAX_CPUS] = [const { TaskStateSegment::new() }; MAX_CPUS];
// GDT entries:
// 0: Null
// 1: Kernel Code 64 (0x08)
// 2: Kernel Data 64 (0x10)
// 3: User Data 64 (0x18)
// 4: User Code 64 (0x20)
// 5,6: TSS CPU 0 (0x28)
// 7,8: TSS CPU 1 (0x38)
// 9,10: TSS CPU 2 (0x48)
// 11,12: TSS CPU 3 (0x58)
// 13,14,15: padding
static mut GDT: [u64; 16] = [
0x0000000000000000, // 0x00: Null
0x00af9a000000ffff, // 0x08: Kernel Code 64 (Ring 0)
0x00cf92000000ffff, // 0x10: Kernel Data 64 (Ring 0)
0x00cff2000000ffff, // 0x18: User Data 64 (Ring 3)
0x00affa000000ffff, // 0x20: User Code 64 (Ring 3)
0x0000000000000000, // 0x28: TSS Low (populated at init)
0x0000000000000000, // 0x30: TSS High (populated at init)
0x0000000000000000, // 0x38: Alignment / padding
0, 0, // 0x28: TSS CPU 0
0, 0, // 0x38: TSS CPU 1
0, 0, // 0x48: TSS CPU 2
0, 0, // 0x58: TSS CPU 3
0, 0, 0, // Padding
];
pub unsafe fn init() {
let tss_addr = core::ptr::addr_of!(TSS) as u64;
let tss_size = (size_of::<TaskStateSegment>() - 1) as u64;
// Build 64-bit TSS descriptor
let tss_low = (tss_size & 0xffff)
| ((tss_addr & 0xffff) << 16)
| (((tss_addr >> 16) & 0xff) << 32)
| (0x89u64 << 40) // Present, 64-bit TSS (Available)
| (((tss_size >> 16) & 0xf) << 48)
| (((tss_addr >> 24) & 0xff) << 56);
let tss_high = tss_addr >> 32;
let gdt_ptr = core::ptr::addr_of_mut!(GDT) as *mut u64;
*gdt_ptr.add(5) = tss_low;
*gdt_ptr.add(6) = tss_high;
// Populate TSS descriptors for all supported CPU cores
for cpu in 0..MAX_CPUS {
let tss_addr = if cpu == 0 {
core::ptr::addr_of!(TSS) as u64
} else {
core::ptr::addr_of!(PER_CPU_TSS[cpu]) as u64
};
let tss_size = (size_of::<TaskStateSegment>() - 1) as u64;
let tss_low = (tss_size & 0xffff)
| ((tss_addr & 0xffff) << 16)
| (((tss_addr >> 16) & 0xff) << 32)
| (0x89u64 << 40) // Present, 64-bit TSS (Available)
| (((tss_size >> 16) & 0xf) << 48)
| (((tss_addr >> 24) & 0xff) << 56);
let tss_high = tss_addr >> 32;
let entry_idx = 5 + cpu * 2;
*gdt_ptr.add(entry_idx) = tss_low;
*gdt_ptr.add(entry_idx + 1) = tss_high;
}
let descriptor = GdtDescriptor {
limit: (size_of::<[u64; 8]>() - 1) as u16,
limit: (size_of::<[u64; 16]>() - 1) as u16,
base: gdt_ptr as u64,
};
@@ -95,6 +121,37 @@ pub unsafe fn init() {
);
}
/// Initialize GDT and load dedicated TSS for an Application Processor (AP)
pub unsafe fn init_ap(cpu_id: usize) {
let gdt_ptr = core::ptr::addr_of_mut!(GDT) as *mut u64;
let descriptor = GdtDescriptor {
limit: (size_of::<[u64; 16]>() - 1) as u16,
base: gdt_ptr as u64,
};
let tss_sel = (0x28 + (cpu_id.min(MAX_CPUS - 1) * 16)) as u16;
core::arch::asm!(
"lgdt [{0}]",
"push 0x08",
"lea {tmp}, [2f + rip]",
"push {tmp}",
"retfq",
"2:",
"mov ax, 0x10",
"mov ds, ax",
"mov es, ax",
"mov ss, ax",
"mov fs, ax",
"mov gs, ax",
"ltr {tss_sel:x}",
in(reg) &descriptor,
tmp = out(reg) _,
tss_sel = in(reg) tss_sel,
options(preserves_flags)
);
}
#[no_mangle]
pub extern "C" fn set_kernel_stack(stack_top: u64) {
unsafe {