feat: Intel/AMD AVX & MSR sensors, Gigabit PCIe NICs, AHCI SATA, FAT32, and ogit in Ring 3

2026-09-03 11:32:20 +03:00
parent 6d88c802b6
commit 65cb849918
22 changed files with 1847 additions and 55 deletions
@@ -34,6 +34,7 @@
 #define SYS_TASK_CREATE     29  /* Allocate new user PML4 & thread structure: (name, name_len) -> tid */
 #define SYS_TASK_MAP_PAGE   30  /* Map page into target task: (target_tid, vaddr, src_buf, flags) -> status */
 #define SYS_TASK_START      31  /* Activate thread: (target_tid, entry_rip, user_rsp) -> status */
+#define SYS_CPU_SENSORS     32  /* Query CPU hardware sensors (DTS, MSR, frequency, power): (out_sensors) -> status */

 /* Standard Ring 3 Service Endpoints */
 #define UART_SERVICE_ENDPOINT 2
@@ -131,6 +132,22 @@ typedef struct rtc_data {
    uint8_t  second;
 } rtc_data_t;

+typedef struct cpu_sensors_data {
+    uint32_t core_temp_c[4];     /* Temperature per core in degrees Celsius */
+    uint32_t core_mhz[4];        /* Real-time frequency per core in MHz */
+    uint32_t pkg_watts_mw;       /* Package power consumption in milliwatts */
+    uint32_t throttle_flags;     /* Thermal throttle active flags */
+    uint32_t tj_max;             /* Junction temperature max */
+    char     vendor[16];         /* GenuineIntel / AuthenticAMD */
+} cpu_sensors_data_t;
+
+static inline sysret_t sys_cpu_sensors(cpu_sensors_data_t *out_sensors) {
+    register uint64_t rax __asm__("rax") = SYS_CPU_SENSORS;
+    register uint64_t rdi __asm__("rdi") = (uint64_t)out_sensors;
+    __asm__ volatile("syscall" : "+r"(rax) : "r"(rdi) : "rcx", "r11", "memory");
+    return (sysret_t)rax;
+}
+
 /* Low-level inline syscall invocations adhering to System V AMD64 ABI + Fast-Path */

 static inline sysret_t sys_ipc_call_raw(cap_t dest_cap, uint64_t msg_code,