feat: initial scalable x86_64 microkernel skeleton with Limine, Rust, C HAL, and C++20 IPC
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/* opencoreC - Thread Context Switch */
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.global switch_to
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.section .text
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/*
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* void switch_to(uint64_t **prev_rsp_ptr, uint64_t *next_rsp);
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* RDI = pointer to current thread's stored RSP
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* RSI = target thread's RSP
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*/
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switch_to:
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/* Push callee-saved registers of outgoing thread */
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push rbp
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push rbx
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push r12
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push r13
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push r14
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push r15
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/* Save current stack pointer */
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mov [rdi], rsp
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/* Load target stack pointer */
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mov rsp, rsi
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/* Pop callee-saved registers of incoming thread */
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pop r15
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pop r14
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pop r13
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pop r12
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pop rbx
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pop rbp
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ret
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