RarDog
eed05c1eca
- Implement Limine v8 boot protocol requests in dedicated PT_LOAD RW segment - Configure IOPL=3 and SSE in arch setup for Ring 3 drivers and libc - Unify scheduler context switching via switch_to and preempt_tick - Support dual-source keyboard/serial input in sys_key_read - Add automated 'make image' and 'make run' targets for instant QEMU launch - Complete interactive UNIX-like shell (osh) with built-in commands & ramdisk
77 lines
1.7 KiB
ArmAsm
77 lines
1.7 KiB
ArmAsm
/* opencoreC - Thread Context Switch & Entry Trampoline */
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.global switch_to
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.global thread_entry_trampoline
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.section .text
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/*
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* switch_to(uint64_t *prev_rsp_ptr, uint64_t next_rsp)
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* RDI = ¤t_thread.context.rsp (save current RSP here)
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* RSI = next thread's saved RSP
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*/
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switch_to:
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/* Save callee-saved registers of outgoing thread */
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push rbp
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push rbx
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push r12
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push r13
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push r14
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push r15
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/* Save RSP of outgoing thread */
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mov [rdi], rsp
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/* Load RSP of incoming thread */
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mov rsp, rsi
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/* Restore callee-saved registers of incoming thread */
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pop r15
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pop r14
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pop r13
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pop r12
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pop rbx
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pop rbp
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ret
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/*
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* thread_entry_trampoline:
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* Jumped to via 'ret' in switch_to when a newly created thread runs for the first time.
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* When create_user_thread created the stack:
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* R12 was populated with user_rsp
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* R13 was populated with entry_rip
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*/
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thread_entry_trampoline:
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/* Set user data segments (0x18 | 3 = 0x1B) */
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mov ax, 0x1B
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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/* Build hardware IRETQ frame on kernel stack */
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push 0x1B /* User SS */
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push r12 /* User RSP */
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push 0x3202 /* RFLAGS (IF=1, IOPL=3 for hardware drivers) */
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push 0x23 /* User CS (0x20 | 3 = 0x23) */
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push r13 /* User RIP */
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/* Clear all general-purpose registers */
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xor rax, rax
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xor rbx, rbx
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xor rcx, rcx
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xor rdx, rdx
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xor rsi, rsi
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xor rdi, rdi
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xor rbp, rbp
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xor r8, r8
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xor r9, r9
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xor r10, r10
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xor r11, r11
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xor r12, r12
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xor r13, r13
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xor r14, r14
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xor r15, r15
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/* Transition to Ring 3 */
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iretq
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