RarDog
eed05c1eca
- Implement Limine v8 boot protocol requests in dedicated PT_LOAD RW segment - Configure IOPL=3 and SSE in arch setup for Ring 3 drivers and libc - Unify scheduler context switching via switch_to and preempt_tick - Support dual-source keyboard/serial input in sys_key_read - Add automated 'make image' and 'make run' targets for instant QEMU launch - Complete interactive UNIX-like shell (osh) with built-in commands & ramdisk
46 lines
875 B
ArmAsm
46 lines
875 B
ArmAsm
/* opencoreC - Timer Preemptive Interrupt Trampoline (Vector 32 / 0x20) */
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.global timer_isr_entry
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.extern timer_interrupt_handler
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.section .text
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timer_isr_entry:
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/* 1. Save all general-purpose registers to form complete interrupt context frame */
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push rax
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push rbx
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push rcx
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push rdx
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push rsi
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push rdi
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push rbp
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push r8
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push r9
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push r10
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push r11
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push r12
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push r13
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push r14
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push r15
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/* 2. Call handler in Rust (sends EOI and invokes sched.preempt_tick) */
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call timer_interrupt_handler
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/* 3. Restore all general-purpose registers */
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pop r15
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pop r14
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pop r13
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pop r12
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pop r11
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pop r10
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pop r9
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pop r8
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pop rbp
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pop rdi
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pop rsi
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pop rdx
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pop rcx
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pop rbx
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pop rax
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/* 4. Return from interrupt (IRETQ restores RIP, CS, RFLAGS, RSP, SS) */
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iretq
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